The present invention relates to a solid state imaging device capable of suppressing generation of a dark current, a method of manufacturing the same, and an imaging apparatus.
Solid state imaging devices, such as a CCD (charge coupled device) and a CMOS image sensor, are widely used in a video camera, a digital still camera, and the like. Improvement in sensitivity and noise reduction are important issues in all kinds of solid state imaging devices.
In particular, a dark current, which is detected as a very small current when an electric charge (electron) generated from a minute defect in a substrate interface of a light receiving surface is input as a signal, or a dark current generated due to the interface state on the interface between the light sensing section and an upper layer even though there is no pure signal charge generated by photoelectric conversion of incident light in a state where there is no incident light is a noise to be reduced in the solid state imaging device.
As a technique of suppressing generation of a dark current caused by the interface state, for example, an embed type photodiode structure having a hole accumulation layer 23 formed of a P+ layer on a light sensing section (for example, a photodiode) 12 is used as shown in (2) of FIG. 42. Moreover, in this specification, the embed type photodiode structure is referred to as an HAD (hole accumulated diode) structure. As shown in (1) of FIG. 42, in a structure where the HAD structure is not provided, electrons generated due to the interface state flow to the photodiode as a dark current. On the other hand, as shown in (2) of FIG. 38, in the HAD structure, generation of electrons from the interface is suppressed by the hole accumulation layer 23 formed on the interface. In addition, even if electric charges (electrons) are generated from the interface, the electric charges (electrons) do not flow to a charge accumulation section, which is a potential well in an N+ layer of the light sensing section 12, but flow to the hole accumulation layer 23 of the P+ layer in which many holes exist. Accordingly, the electric charges (electrons) can be eliminated. As a result, since it can be prevented that the electric charges generated due to the interface are detected as a dark current, the dark current caused by the interface state can be suppressed.
As a method of forming the HAD structure, it is common to perform ion implantation of impurities for forming the P+ layer, for example, boron (B) or boron difluoride (BF2) through a thermally oxidized layer or a CVD oxide layer formed on a substrate, to activate injected impurities by annealing, and then to forma p-type region near the interface. However, heat treatment in a high temperature of 700° C. or more is essential in order to activate doped impurities. Accordingly, formation of the hole accumulation layer using ion implantation is difficult in a low-temperature process at 400° C. or less. Also in the case of desiring to avoid long-time activation at high temperature in order to suppress diffusion of dopant, the method of forming a hole accumulation layer in which ion implantation and annealing are performed is not preferable.
Furthermore, when a silicon oxide or a silicon nitride formed on an upper layer of the light sensing section is formed in a low-temperature plasma CVD method, for example, the interface state is reduced compared with an interface between of a light receiving surface and a layer formed at high temperature. The reduction in interface state increases a dark current.
As described above, in the case of desiring to avoid ion implantation and annealing process at high temperature, not only the hole accumulation layer cannot be formed by known ion implantation but also a dark current is further reduced. In order to solve the problem, it becomes necessary to form a hole accumulation layer in another method that is not based on ion implantation in the related art.
For example, there is disclosed a technique in which charged particles having the same polarity as an opposite conduction type are embedded in an insulating layer formed of a silicon oxide on a photoelectric conversion element having a conduction type opposite a conduction type of a semiconductor region formed within a semiconductor region to thereby pull up an electric potential of a surface of the photoelectric conversion section and form an inversion layer on the surface and as a result, generation of a dark current is reduced by preventing depletion of the surface (for example, refer to JP-A-1-256168). However, in the above technique, a technique of embedding the charged particles into the insulating layer is needed, but it is not known which kind of embedding technique is used. In addition, in order to inject electric charges into the insulating layer from the outside as normally used in a nonvolatile memory, an electrode used to inject electric charges is needed. Even if electric charges can be injected from the outside in a non-contact state without using an electrode, the electric charges trapped in the insulating layer are not detrapped. Accordingly, an electric charge holding property becomes a problem. For this reason, since a high-quality insulating layer having a high electric charge holding property is requested, it has been difficult to realize the insulating layer.